The Frontend Design Lead/Manager requirement in large semicon
Posted by verification job on June 9, 2010
Required Skills
Self starter with 7-10 years of experience on SOC/Chip level/Cluster/IP design on multimillion Gate and complex Design with multiple clocks and power domains – with minimal supervision.
Experience in microcontroller architecture, Cache, protocols like AHB/AMBA,AXI, Memory(Flash, SRAM,DDR) and memory controllers
Experience in automotive protocols like LIN, CAN, Flexray.
Graphics/Multimedia/Networking protocols like Ethernet, USB, ITU T.656 would be an advantage.
Experience and extensive hands on knowledge of HDLs (Verilog/VHDL), Scripting languages (Perl, Tcl), C/C++ for hardware modeling.
Exposure to the various Front end Integration techniques using IPXACT, CSV Scripts.
Hands on work on pre silicon validation using FPGA/Palladium would be a significant added advantage.
Experience in Low power designs with various Clock gating, DVFS techniques.
Work on Testbench and Testplan development along with the verification team. Addressing of the Analog/Mixed signal and Testability aspects of the SoC/IP along with functional requirements would be an advantage.
Leadership experience in quality management and quality improvement
For more details mail to jabeena@mindsoftconsulting.com
Mobile:9538716955
