Verification job's Blog

Brought to you by

  • Post Your Job openings for FREE

    That's right FREE job postings!!! Employers and Recruiters can post a job opportunity making it viewable to millions of readers for free. Send opening details to
  • Enter your email address to subscribe to this blog and receive notifications of new posts by email.

    Join 233 other followers

  • UVM/OVM interview questions

    Find them @

Brocade – Bangalore

Posted by verification job on July 26, 2010

Job Title: Senior ASIC verification engineer
Requisition #: 3984
Function: Engineering
Country: India
State: Karnataka
City: Bangalore
Travel Requirements: Up to 25%
Position Type: Employee
Position Level: Professional
Job Description: Day-to-Day Responsibilities

• Develop test bench using System Verilog
• Develop test cases and do full chip verification
• Design using RTL and perform timing analysis

Qualifications/Job Responsibilities: • Working knowledge of networking protocols
• Experience with verilog RTL coding
• Experience in ASIC methodologies and tools (synthesis, timing and formal verification)
• Experience in C++, System verilog and scripting languages like PERL

• BE/B.Tech in EE/CS and about 7yrs experience in ASIC development

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out /  Change )

Google photo

You are commenting using your Google account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s

%d bloggers like this: