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ASIC Design-Verification lead (DVL-08-01)

Posted by verification job on August 19, 2010

Job code: DVL-08-01

Exp: 4-8 years

Note: there are also individual contributor roles. Summary of skills needed:

– Advanced verification methodologies, preferably SystemVerilog – including testbench development
– (G)DDR2/3 verification experience
– Good problem solving, teamwork

Send CV to career@cvcblr.com
———-

As an ASIC Verification engineer at high end semiconductor design house, verify the design and
implementation of the industry’s leading Graphics and Video
Processors. Specific areas include 2D and 3D graphics, mpeg, video,
audio, high-speed IO interfaces and bus protocols, and memory
subsystem design. In this position, you will be responsible for
verification of the ASIC design – architecture and micro-architecture
– and it may include pre-silicon, emulation, and post-silicon
activities. You are expected to understand the design and
implementation, define the verification scope, develop the
verification infrastructure and verify the correctness of the design.
You will be working with architects, designers, pre and post silicon
verification teams to accomplish your tasks.

Requirements:
Exposure to design and verification tools (VCS or equivalent
simulation tools, debug tools like Debussy)
Good debugging and problem solving skills. Scripting knowledge
Expertise in SystemVerilog or similar HVL
C/C++ programming language experience desirable
Experience in architecting test bench environments for unit and system
level verification
Experience in verification using random stimulus along with functional
coverage and assertion-based verification methodologies
Good communication skills and ability & desire to work as a team
player are a must
Qualification:
BS / MS with 8+ years of experience

From http://www.cvcblr.com/blog/?p=193

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