Verification job's Blog

Brought to you by

  • Post Your Job openings for FREE

    That's right FREE job postings!!! Employers and Recruiters can post a job opportunity making it viewable to millions of readers for free. Send opening details to
  • Enter your email address to subscribe to this blog and receive notifications of new posts by email.

    Join 236 other followers

  • UVM/OVM interview questions

    Find them @

DV Synapse Design

Posted by verification job on August 31, 2010

DV Synapse Design p


Design Verification

Create verification plans for SoC level verification

Create testbenches in C/C++

Utilize advanced verification techniques

Write tools and scripts in Perl and other script languages to enhance the verification process

Qualifications and requirements:

BS, MS, PhD, in computer science or engineering

Working knowledge of ARM-based processors and AMBA bus protocols

Experience with simulators from one or more of the major EDA suppliers (Cadence, Mentor or Synopsys)

Working knowledge of Verilog

Experience with tools for regression management, configuration management and bug tracking

Good problem solving and debugging skills

Qualifications: BS or MS

Experience: 4 to 12 yrs

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out /  Change )

Twitter picture

You are commenting using your Twitter account. Log Out /  Change )

Facebook photo

You are commenting using your Facebook account. Log Out /  Change )

Connecting to %s

%d bloggers like this: