Mirafra Technology

Req 3 :Networking : 6 Position; Bangalore
…………………………………..

1. B.Tech (IIT/NIT/REC) with more than 3 to 6 years of Verification
experience

2. Very good knowledge of System Verilog

3. Should have In-depth knowledge of VMM/OVM Methodologies

4. Should have worked on Module and SOC level verification

5. Should have knowledge to developing Verification Environment and Test
Bench

6. Should have worked on Networking Domain (Gigabit Ethernet, SAN,
Switches, L2/L3, GMII)

Please send your cv in tridip@mirafra.com

Mirafra Technology

Req 2 : ARM : 1 Position : Bangalore
……………………………….
1. Experience in SoC/CPU subsystem verification
2. Familiarity with ARM, AHB, AXI, APB protocols
3. SystemVerilog expertise
4. DMA/Switching knowledge is desirable
5. 6 -10 years of strong experience in DV
6. B.Tech/M.Tech from IIT, BITS, REC

Please send your cv in tridip@mirafra.com

Mirafra Technology – Req 1 : Design :2 Position : Location : Hyderabad

1. 5+ yrs of exp with Architectural and Micro-architecture

2. RTL Design (VHDL/Verilog)

3. Knowledge of TCP/IP, L2/L3 switch is desirable

4. Interlaken Protocol is added advantage

5. DFT is added advantage

6. B.Tech/M.Tech from IIT, BITS, REC

Please send your cv in tridip@mirafra.com

Cadence – .OVM developer

Job ID #: 3723	Location: Rosh Haayin, Israel
Functional Area: Engineering	Cost Center: Solution Arch IL
Position Type: Regular	Education Required: Not Indicated
Experience Required: Not Indicated	Relocation Provided: No

Position Description lead developer for OVM SystemVerilog Collaborating in standards body, i.e., Accellera Enhancing OVM library and optimizing it for performance and scalability Meeting with customers to understand new verification issues and how to extend OVM to help solve these issues Position Requirements Strong SystemVerilog language expertise Testbench verification methodology experience Verification Engineering experience, developing constrained-random, coverage-driven testbenches Good software development skills Strong team work skills and communications skills required

Cadence Design Systems – Senior Member of Technical Staff

Job ID #: 3817 Location: Noida, India

Functional Area: Engineering Cost Center: VIP Noida

Position Type: Regular Education Required: Not Indicated

Experience Required: Not Indicated Relocation Provided: Yes

Position Description

The person should be an Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL). He/ she should have prior experience in simulation using these languages. He/ she should have a good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools. He/ she should have working knowledge of using the UNIX operating system, utilities and shell scripting. Experience in process automation with PERL or Tcl scripting is required. Experience with SystemVerilog or PSL is a plus. Experience with Functional Verification of complex digital systems with advanced testbenching techniuqes , e.g. SoC Verification, with a Hardware Verification Language (HVL) like SystemC/ Vera or SystemVerilog and Verification IP is a strong match for this position.

The person should have a track record in software testing methodology and tools and experience  as a practitioner of Quality Processes and Practices. A clear understanding of the Software Development Process (or a Product Development Process) is essential. He/ she should have good communication skills and a track record as a good teamplayer.

MSG Design Engineer/Lead – FREESCALE

Job ID: 61954

Location: INDIA – NOIDA

Job Interest: IC Design Engineering

Position Type: Full-time experienced

Relocation Available:

Required Education: Bachelors / Degree

Required Experience: 5 – 10

Department Description

MSG

Scope of Responsibilities/Expectations

• As a Design Lead, you will be responsible for owning complete verification effort for complex SOC’s.

• You will define chip level verification strategies, test planning, and develop/drive team to develop all necessary tools and scripts to enable system-level testing in an automated fashion.

• You will responsible for driving and guiding verification team for the entire verification effort.

• You will require to work with the validation/test teams globally to support silicon testing after tape out.

Specific Knowledge/Skills

• Candidate must possess at least a Bachelor of Engineering/Technology in Engineering (Electrical/Electronic) or equivalent.

• Experience of leading verification for complex SoC for atleat 1-2 projects.

• Experience in silicon validation/testing is a plus.

• Excellent domain expertise, proven leadership skills and team management skills.

• 6 + year experience in ASIC/System level verification

• Expertise in verifying complex designs from system as well as block level, through design flow.

• Strong knowledge of HDLs(Verilog/VHDL/SystemVerilog), C/C++.

• Good Scripting knowledge using Perl/Tcl/shell

• Good knowlegde of simulators,Formal verification tools, Coverage driven verification.

• Applicants must be willing to work in NOIDA.

• Applicants should be Indian citizens or hold relevant residence status.

• Preferably Senior Executives specializing in Engineering – Electronics/Communication or equivalent

MSG Design Engineer/Lead FREESCALE

Job ID: 61955

Location: INDIA – NOIDA

Job Interest: IC Design Engineering

Position Type: Full-time experienced

Relocation Available:

Required Education: Bachelors / Degree

Required Experience: 5 – 10

Department Description

Microcontroller Solutions Group

Overview

The Microcontroller Solutions Group (MSG) is a global leader in the design, manufacturing and marketing of microcontrollers (MCUs) and embedded processors in the automotive, consumer and industrial markets. These products include 8-, 16- and 32-bit MCUs, 16-bit digital signal controllers (DSCs) and 32-bit microprocessors, as well as wireless connectivity solutions. Freescale is the world’s No. 1 supplier of semiconductors to global auto manufacturers and the No. 2 supplier of MCUs. We provide comprehensive design solutions, including software, development tools, application support, training, documentation and reference platforms, enabling our customers to rapidly go to market.

Customers

Select customers include:

Bosch

Continental

Electrolux

Hyundai Autonet

Whirlpool

Scope of Responsibilities/Expectations

• As a Design Lead, you will be responsible for owning complete verification effort for complex SOC’s.

• You will define chip level verification strategies, test planning, and develop/drive team to develop all necessary tools and scripts to enable system-level testing in an automated fashion.

• You will responsible for driving and guiding verification team for the entire verification effort.

• You will require to work with the validation/test teams globally to support silicon testing after tape out.

Specific Knowledge/Skills

• Candidate must possess at least a Bachelor of Engineering/Technology in Engineering (Electrical/Electronic) or equivalent.

• Experience of leading verification for complex SoC for atleat 1-2 projects.

• Experience in silicon validation/testing is a plus.

• Excellent domain expertise, proven leadership skills and team management skills.

• 6 + year experience in ASIC/System level verification

• Expertise in verifying complex designs from system as well as block level, through design flow.

• Strong knowledge of HDLs(Verilog/VHDL/SystemVerilog), C/C++.

• Good Scripting knowledge using Perl/Tcl/shell

• Good knowlegde of simulators,Formal verification tools, Coverage driven verification.

• Applicants must be willing to work in NOIDA.

• Applicants should be Indian citizens or hold relevant residence status.

• Preferably Senior Executives specializing in Engineering – Electronics/Communication or equivalent

Unit Test Consultant in Core Network

Number of Vacancies 1

Project time 3 months with likely extensions to long term project

Location Sweden

Responsibilities/Job description: Responsible for test improvement for unit test phase. According to test improvement requirement:

Improve the unit test validity

Improve the automatic regression test

Improve the daily building test

Competence/Qualifications:

More than 10 years direct experience with a proven track record within a well-known international telecommunication equipment vendor.

Rich experience in test improvement

Deep understanding unit test

Additional skills:

Bachelor or masters or higher in electrical engineering, or equivalent

The candidate should have a high focus on delivering high quality work

The candidate can work independently as well as in a team

Fluent English speaking and writing

Sensitive insight on novel board power technique and development trend.

Business trip:

Yes

If interestd, please send an email to assignment[at]opencores.org with the project title in the subject field. In the email you should includ:

• a presentation of why you are the perfect candidate for the assignment
• an updated CV in word format
• availability date
• price per hour

Job Title – Senior ASIC Design Engineers

———————————-

Experience – 5 – 12yrs

Job Description –

Role: Independently handle architecture and design of a SoC product line.
Able to handle a team of 3+ engineers
Provide customer support
Drive process implementations and mentoring

Technical Skills: Experience in architecting SoCs.
Experience in synthesizable low-power verilog-based design
Experience in spec to silicon of SoCs.
Experience in High Speed Serial protocols – USB 2.0/3.0, PCIe, SATA

send resume to jobs@testbench.in

Senior ASIC Verification Engineer

Job Title – Senior ASIC Verification Engineers
Experience – 5 – 12yrs

Job Description –

Role: Independently handle verification of a product line.
Able to handle a team of 3+ engineers
Provide customer support
Drive process implementations and mentoring

Technical Skills: Experience in Verilog
Expert knowledge in High Level Verification languages like SystemVerilog, e, vera
Expert knowledge in Object Oriented Verification Methodologies e.g. OVM, eRM, VMM
Experience in High Speed Serial protocols – USB 2.0/3.0, PCIe, SATA
Experience in architecting BFM IPs for High Speed Serial Protocols
Experience in SoC verification
Experience in Customer interaction, pre-sales and post-sales

Send resumes to jobs@testbench.in