RTL Design Openings ( ASIC ), Exp Level 3 ~ 7 YrsExp, in Bangalore.

For more details, Email Me: rahman.a@alpconsulting.in;

I shall revert back to you with client details..

RTL design preferably with communication & Storage domain

Design Exp in Ethernet MAC, PCS domain for 100G, 40 G MAC and PCS layer

Design Exp in SONET for Generic framing protocols (GSP,GBP) upto 100 Ghz

Design Exp in CPU subsystems at block level, system bus level with peripherals like DMA controllers

Design Exp on High speed Packet interfaces

Design exp on OTM (Optical transport Mechanism)

Design engineers must be confident on High speed ,complex IP’s at 65nm and 40 nm nodes. They should understand asynchronous protocols and multiclock domains

ASIC -Specman based Verification, in Bangalore.

For more details, Email Me: rahman.a@alpconsulting.in;

I shall revert back to you with client details..

Job Description

· Good Specman based Verification experience (2-7yrs )

· Created Verification plans [Vmanager preferred] & test bench architecture document

· Developed at least 2/3 interface eVC

· Developed Verification environment from scratch

· Involved in module level

· System level verification would be preferred

· Exposure to methodologies such eRM, sVM(preferred)

· Exposure to ISX tool would be preferred

· Basic knowledge of Bus protocols : AHB , AXI, CAN, LIN, FlexRay etc

· Verified peripherals like : Interrupt Controller, Flash Memory I/F,

Quad SPI etc

Qualcomm Functional Formal Verification (San Diego & Santa Clara)

Qualcomm is currently seeking candidates for positions focused on functional formal verification technology such as model checking, property verification, and formal methods. Projects include functional design verification, protocol verification, post-silicon debugging, clock domain crossing verification, deadlock detection, and developing new applications by leveraging existing formal verification tools in industry. Responsibilities include requirements collection, problem formulation, functional formal verification, solution proposal, implementation, testing, documentation, deployment, and user support.

You can review and apply to positions 1879348 and 1879315 via the following link: http://jobs.qualcomm.com/staffing/Staffing.asp?page=search . Qualcomm is an equal opportunity employer, but at the moment we are only able to consider candidates currently residing in North America.

.

Qualcomm SoC, Multi-media, Modem DV (Design Verification) – SystemVerilog, Vera, OVM, SystemC, etc.

Qualcomm is actively seeking candidates for full-time positions in functional design verification at our San Diego (G1879549) and Santa Clara (G1786478) locations to be involved in the design verification of multi-media, modem and SoC program that will lead the industry to the next generation of mobile devices.

Positions require a minimum of 5 years industry experience in functional design verification (DV) using HVLs like System Verilog, Vera and SystemC; formal verification experience a plus. In order to be considered, candidates must satisfy industry experience requirements, be located in the United States, and be willing to relocate to the locations referenced above. Positions can be reviewed and applications submitted via the following link:

http://jobs.qualcomm.com/staffing/Staffing.asp?page=search .

Qualcomm SoC, Multi-media, Modem Formal DV (Formal Design Verification) – SVA, PSL, etc.

Qualcomm is actively seeking candidates for full-time positions in functional design verification at our San Diego(G1879348) and Santa Clara(G1879315) locations to be involved in the formal verification (property checking/model checking) of multi-media, modem and SoC program that will lead the industry to the next generation of mobile devices.

Positions require a minimum of 5-7 years industry experience in functional design verification (DV) with an extended period of time (at least 2 years) in the application of formal verification to complex digital designs. In order to be considered, candidates must satisfy industry experience requirements, be located in the United States, and be willing to relocate to the locations referenced above. Positions can be reviewed and applications submitted via the following link: http://jobs.qualcomm.com/staffing/Staffing.asp?page=search .

Sr. Verification Engineer requirement for Bangalore location

Requirements:

1. 6 to 10 yrs Experience in the field of Digital Front End verification

2. Sound knowledge of industry standard protocols [SPI, I2C, USB, ETHERNET…]

3. Sound knowledge of Module and System-level verification using assembly based/HVL

4. Hands on experience in writing testcases, developing verification requirements, verification plan at module/system level

5. Exposure to Microcontroller/Microprocessor architecture

6. Exposure to System-Verilog is an advantage

7. Capable of either working independently OR leading 1-2 junior engineers/Interns

For more details mal to: jabeena@mindsoftconsulting.com

Mobile:9538716955

Kindly pass on this requirement to your friends/colleagues.

vitesse — MTS – Verification

Job Code: 3583

Category: Engineering

Location: Hyderabad, India

Description

Vitesse is seeking for a candidate with experience on pre-silicon verification which includes block level / full chip integration, test bench design and development, and validation.  Accountable for test plan development, test suite development, debug, assertions, monitors/checkers, PERL/TCL, Scripting and DFT.  Must possess hands on experience with system Verilog and HVL based verification.

Required Qualifications:

·          3+ years of ASIC verification experience.

·          Strong Academics with specialization in VLSI technology and Digital Electronics.

·          Experience with IP and Ethernet network.

·          Knowledge of Vera, System Verilog, ‘e’, SystemC.

·          Exposure to advanced verification methodologies such as URM, eRM, RVM, AVM or OVM, etc.

·          Prior experience in HVL’s such as Open Vera, SystemVerilog, ‘e’ language.

·          Strong programming skills in C and object oriented programming (C++ or other OO language).

·          Strong scripting skills in Unix scripting languages (bash, csh, etc.), TCL and Perl.

·          Strong in HDL’s – Verilog / VHDL.

·          Expert in Verilog for verification and be able to read designs.

·          Strong in digital design.

·          Must possess good interpersonal, analytical and communication skills.

·          Be able to work in a challenging and engaging work environment that promotes teamwork, creativity, accountability and professional development.

Preferred:

·          Domain knowledge in networking.

·          Prior experience in interacting with multi site teams will be a big plus.

·          Experience with ASIC bring up and SOC.

Requires a Bachelor’s degree in Engineering from a reputable institution.  Master’s degree in Engineering preferred.

Vitesse offers a competitive salary and immediate, comprehensive benefits package.  We are an equal opportunity employer M/F/D/V.

via Careers Career Opportunities.

Sr MTS – Design

Job Code: 3554

Category: Engineering

Location: Denmark

Description

Senior analog ASIC design engineer having strong experience with CMOS design.  Will be working with different analog design issues, but mostly related to high speed interfaces.  Experience with high speed SerDes design, clock/data recovery, high speed PLLs is desirable.  Physical design knowledge is required and physical design experience is desirable.

Will be part of a very experienced design team and will be a key contributor on projects.  Must be able to work independently as well as part of a larger international multi-site development team.  Must exhibits good judgment and contributes to the development of new principles, concepts, or techniques.  Must be able to identify issues and come up with solutions in imaginative as well as practical ways.  Must be able to communicate and present data and ideas clearly and thoroughly.

BSEE with 7+ years experience required.  MSEE with 10+ years experience preferred.

Vitesse offers a competitive salary and immediate, comprehensive benefits package.  We are an equal opportunity employer M/F/D/V.

via Careers Career Opportunities.

ASIC Verification SystemVerilog, VMM,AHB / AXI

Posted by: A client of Talent HR Solutions / mail ur resume:- ashoktalenthrs.net
Posted date: 17-Mar

Job Description:Atleast 4+ years of experience in ASIC verification.SystemVerilog is a must.VMM is required.Should be familiar to Verification IP.Experience with VMM is preferable.Expertise in AHB / AXI essential.

Desired Candidate ProfileAtleast 4+ years of experience in ASIC verification.SystemVerilog is a must.VMM is required.Should be familiar to Verification IP.Experience with VMM is preferable.Expertise in AHB / AXI essential.

Experience Required: 3 – 8 Years

Education Required: UG – B.Tech/B.E. – Any Specialization PG – M.Sc – Any Specialization,M.Tech – Any Specialization,MCA – Computers

Post Details

Job Title ASIC Verification( SystemVerilog, VMM,AHB / AXI) Classification IT / Telecommunication Jobs Job Type Full-time Location Ahmedabad Jobs Country INDIA Job Salary Rupees 6,00,000 – 16,00,000 Company and Contact Details Company A client of Talent HR Solutions / mail ur resume:- ashoktalenthrs.net Company Profile A leading IT-Semiconductor company . For more detail about the opening, pls contact us-91-0-9811964222 ) & post your resume :- ashoktalenthrs.net Address:Not Mentioned Contact Person Name Ashok Sharma

Mirafra Technology

Req 4 :DSP : 1Position: Bangalore
……………………………
1. DSP Functions verification (Filters, transformers..etc)

2. Strong verification experience using VMM

3. 2 to 5 yrs of Experience (VMM is a ‘must have skill’ with of-course DSP
background)
4. B.Tech/M.Tech from IIT, BITS, REC

Please send your cv in tridip@mirafra.com